The present invention relates to electronic circuits, and more particularly, to techniques for varying phase shifts in periodic signals.
Many modern digital data systems transmit high-speed data without a clock signal. A receiver that receives the transmitted data generates a clock signal from a reference frequency signal using a phase-locked loop. The receiver then phase-aligns the clock signal to the transitions in the data using a clock and data recovery (CDR) circuit.
Periodic jitter in the data or in the reference frequency signal may cause the CDR circuit to get caught in a dead-zone. When the CDR circuit is caught in a dead-zone, the CDR circuit fails to adjust the phase of the recovered clock signal to the appropriate phase in response to the transitions of the input data signal. The CDR circuit may sample incorrect data when the CDR circuit is caught in a dead-zone. Therefore, it would be desirable to provide a CDR circuit that does not get caught in a dead-zone.